Logism

In this project, I used logism to model a fully functional RISC-V CPU.
Specification

Specifically, I created:

  • an Arithmetic Logic Unit (ALU) which supports operations such as add, mul, and, or, etc.
  • a Register File
  • a large portion of RISC-V’s ISA by creating
    • the memory unit
    • a branch comparator
    • an immediate generator
    • control logic
    • control status register (CSR)
    • processor
61c_proj3_test_harness.png